Advertisement
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Look-Ahead Carry Block
The MC14582B is a CMOS look–ahead carry generator capable of
anticipating a carry across four binary adders or groups of adders. The
device is cascadable to perform full look–ahead across n–bit adders. Carry,
generate–carry, and propagate–carry functions are provided as enumerated
in the pin designation table shown below.
Expandable to any Number of Bits
All Buffered Outputs
Low Power Dissipation
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–Power
Schottky TTL Load over the Rated Temperature Range
MAXIMUM RATINGS*
(Voltages Referenced to V SS )
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Symbol
Parameter
V DD
DC Supply Voltage
V in , V out
Input or Output Voltage (DC or Transient)
I in , I out
Input or Output Current (DC or Transient),
per Pin
P D
Power Dissipation, per Package†
T stg
Storage Temperature
T L
Lead Temperature (8–Second Soldering)
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic "P and D/DW" Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C
Ceramic "L" Packages: – 12 mW/ _ C From 100 _ C To 125 _ C
LOGIC EQUATIONS
C n+x = G0 + (P0
C n )
C n+y = G1 + (P1
G0) + (P1
C n+z = G2 + (P2
G1) + (P2
G = G3 + (P3
G2) + (P3
P = P3
P2
P1
P0
Designation
G0, G1, G2, G3
P0, P1, P2, P3
C n
C n+x , C n+y
C n+z
G
P
MC14582B
6–494
– 0.5 to + 18.0
– 0.5 to V DD + 0.5
– 65 to + 150
P0
C n )
P1 G0) + (P2
P1
P0
C n )
P2
G1) + (P1
P2
P3
G0)
PIN DESIGNATIONS
Pin No's
Function
3, 1, 14, 5
Active–Low
Carry–Generate Inputs
4, 2, 15, 6
Active–Low
Carry–Propagate Inputs
13
Carry Input
12, 11, 9
Carry Outputs
10
Active–Low Group
Carry–Generate Output
7
Active–Low Group
Carry–Propagate Output
Value
Unit
V
V
10
mA
500
mW
_ C
_ C
260
MC14582B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBD
SOIC
T A = – 55 to 125 C for all packages.
PIN ASSIGNMENT
G1
1
16
V DD
P1
2
15
P2
G0
3
14
G2
P0
4
13
C in
G3
5
12
C n+x
P3
6
11
C n+y
P
7
10
G
V SS
8
9
C n+z
MOTOROLA CMOS LOGIC DATA
Advertisement
