Motorola CMOS Logic Manual page 482

TRUTH TABLE
Inputs
A S B S C out EAC
0 0 0 0
0 1 0 0
1 0 0 0
1 1 0 1
0 0 1 0
0 1 1 1
1 0 1 1
1 1 1 1
B S = (Add/Sub) B S
A S = Sign of A ("1" = Negative)
B S = Sign of B ("1" = Negative)
C out = Adder Carry Out
MC14560B
6–444
Outputs
End Around Carry
SGN OVF
0 0
0
1 0 1
C out
0
1 0
0*
1 1
* = Center of Symmetry
0 1
0 0
0 0
1 0
0
1
0
0
Figure 10. Mapping of EAC, Sign and Overflow Logic
KARNAUGH MAPS
Sign (SGN)
A S A S
1 1 1
B S
1 0 1
C out
1 0* 0
0 0 1
EAC = S2 (A S B S C out ) + S3 (A S B S C out )
= M 3 (A S B S C out )
SGN = S2 (A S B S C out ) + S3 (A S B S C out )
= M 3 (A S B S C out )
EAC C out
1 0 0
1 1 1
1 1 1
0 0 0
MOTOROLA CMOS LOGIC DATA
Overflow (OVF)
A S
0 1
B S B S
0 0
C out
1 0
0 0
= OVF
0 1
0 0
=
1 0
0 0