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Motorola CMOS Logic Manual page 536

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual Schmitt Trigger
The MC14583B is a dual Schmitt trigger constructed with complementary
P–channel and N–channel MOS devices on a monolithic silicon substrate.
Each Schmitt trigger is functionally independent except for a common
3–state input and an internally–connected Exclusive OR output for use in
line receiver applications. Trigger levels are adjustable through the positive,
negative, and common terminals with the use of external resistors.
Applications include the speed–up of a slow waveform edge in interface
receivers, level detectors, etc.
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Single Supply Operation
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Resistor Adjustable Trigger Levels
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
MAXIMUM RATINGS*
(Voltages Referenced to V SS )
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Symbol
Parameter
V DD
DC Supply Voltage
V in , V out
Input or Output Voltage (DC or Transient)
I in , I out
Input or Output Current (DC or Transient),
per Pin
P D
Power Dissipation, per Package†
T stg
Storage Temperature
T L
Lead Temperature (8–Second Soldering)
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic "P and D/DW" Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C
Ceramic "L" Packages: – 12 mW/ _ C From 100 _ C To 125 _ C
POSITIVE A
6 5
A in
9
3–STATE
13
OUTPUT DISABLE
B in
15
2 3
POSITIVE B 2
MC14583B
6–498
Value
– 0.5 to + 18.0
– 0.5 to V DD + 0.5
– 65 to + 150
LOGIC DIAGRAM
NEGATIVE A
7 COMMON A
1 COMMON B
V DD = PIN 16
V SS = PIN 8
NEGATIVE B
Unit
V
V
10
mA
500
mW
_ C
_ C
260
9
13
15
4
A out
Inputs
11
A out
A
0
0
14
EXCLUSIVE OR
0
0
1
10
B out
1
1
1
12
B out
Z = High impedance at output
MC14583B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBD
SOIC
T A = – 55 to 125 C for all packages.
BLOCK DIAGRAM
6
5
7
V DD = PIN 16
V SS = PIN 8
A Pos A Neg A Com
A out
A in
A out
D is
B out
B in
B out
B Pos B Neg B Com
2
3
1
TRUTH TABLE
Outputs
B
Dis A out A out B out B out
0
0
0
Z
0
0
1
0
1
0
1
0
0
Z
1
1
1
0
1
1
0
0
1
Z
0
0
1
1
0
0
1
0
1
Z
1
1
1
1
0
1
MOTOROLA CMOS LOGIC DATA
4
11
14
10
12
Z
0
1
0
Z
1
0
1
Z
1
1
1
Z
0
0
0

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