Motorola CMOS Logic Manual page 368

OUT
V SS
V DD
V SS = 0.0 V V in
Figure 1. Output Voltage
Test Circuit
ST X = ST Y = V DD
V DD
PULSE
GENERATOR f c
A0, A1
V SS
P D = V DD x I D
Figure 3. Quiescent Power Dissipation
Test Circuit
250
200
150
100
50
0
–10 –5
V in , INPUT VOLTAGE (Vdc)
Figure 5.
MC14529B
6–330
V
V DD
I D
OUT
10 k
V in
TYPICAL R ON versus INPUT VOLTAGE
V DD = 5 V
V SS = –5 V
V DD = 7.5 V
V SS = –7.5 V
0 5 10
V DD
ST X
ST Y
A
V N
B
Z
X3
W
Y3
V SS
Pins 2, 3, 4, 12, 13 and 14 are left open.
V IL : V C is raised from V SS until V C = V IL .
10 µA with V in = V SS , V out = V DD
V IL : at V C = V IL : I S =
V IL : V in = V DD , V out = V SS .
V IH : When V C = V IH to V DD , the switch is ON and the R ON
V IH : specifications are met.
Figure 2. Noise Immunity
Test Circuit
V SS
V in
Figure 4. R ON Characteristics
Test Circuit
250
V DD = 10 V
200
V SS = 0 V
150
100
50
0
0 5 10
V in , INPUT VOLTAGE (Vdc)
Figure 6.
MOTOROLA CMOS LOGIC DATA
I S
1 k
OUT
R L
V DD
V DD = 15 V
V SS = 0 V
15 20 25