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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Programmable Divide-By-N
Dual 4-Bit Binary/BCD
Down Counter
The MC14569B is a programmable divide–by–N dual 4–bit binary or BCD
down counter constructed with MOS P–channel and N–channel enhance-
ment mode devices (complementary MOS) in a monolithic structure.
This device has been designed for use with the MC14568B phase
comparator/counter in frequency synthesizers, phase–locked loops, and
other frequency division applications requiring low power dissipation and/or
high noise immunity.
Speed–up Circuitry for Zero Detection
Each 4–Bit Counter Can Divide Independently in BCD or Binary Mode
Can be Cascaded With MC14568B, MC14522B or MC14526B for
Frequency Synthesizer Applications
All Outputs are Buffered
Schmitt Triggered Clock Conditioning
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
MAXIMUM RATINGS*
(Voltages Referenced to V SS )
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Symbol
Parameter
V DD
DC Supply Voltage
V in , V out
Input or Output Voltage (DC or Transient)
I in , I out
Input or Output Current (DC or Transient),
per Pin
P D
Power Dissipation, per Package†
T stg
Storage Temperature
T L
Lead Temperature (8–Second Soldering)
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic "P and D/DW" Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C
Ceramic "L" Packages: – 12 mW/ _ C From 100 _ C To 125 _ C
CTL = Low for Binary Count
CTL = High for BCD Count
MOTOROLA CMOS LOGIC DATA
– 0.5 to + 18.0
– 0.5 to V DD + 0.5
– 65 to + 150
BLOCK DIAGRAM
P0 P1 P2 P3
3
4
5
9
BINARY/BCD
CLOCK
COUNTER #1
CASCADE
7
FEEDBACK
Value
Unit
V
V
10
mA
500
mW
_ C
_ C
260
CTL 1 CTL 2
P4 P5 P6 P7
12
6
2
10
11
CLOCK
BINARY/BCD
LOAD
COUNTER #2
ZERO DETECT ENCODER
MC14569B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
DW SUFFIX
SOIC
CASE 751G
ORDERING INFORMATION
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBDW
SOIC
T A = – 55 to 125 C for all packages.
13
14
V DD = PIN 16
V SS = PIN 8
15
Q
1 ZERO
DETECT
MC14569B
6–471
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