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LINE POWER ONLY
SYSTEM
CMOS
SYSTEM
INPUTS
All inputs, while in the recommended operating range (V SS
< V in < V DD ) can be modeled as shown in Figure 6. For input
voltages in this range, diodes D1 and D2 are modeled as
resistors, representing the reverse bias impedance of the
diodes. The maximum input current is worst case, 1 µA,
when the inputs are at V DD or V SS , and V DD = 15.0 V. This
model does not apply to inputs with pull–up or pull–down
resistors.
V DD
R1
R2
Figure 5. Input Model for V SS
When left open–circuited, the inputs may self–bias at or
near the typical switchpoint, where both the P–channel and
N–channel transistors are conducting, causing excessive
current drain. Due to the high gain of the inverters (see
Figure 7), the device may also go into oscillation from any
noise in the system. Since CMOS devices dissipate the most
power during switching, this oscillation can cause very large
current drain and undesired switching.
MOTOROLA CMOS LOGIC DATA
POWER SUPPLY
BATTERY BACKUP
SYSTEM
MC14049UB
MC14050B
Figure 4. Battery Backup Interface
R1 = R2 = HIGH Z
7.5 pF
v
v
V in
V DD
MC14049UB
CMOS
MC14050B
SYSTEM
V DD = 5.0 Vdc
SINGLE INPUT NAND, AND
MULTIPLE INPUT NOR, OR
5.0
4.0
3.0
2.0
1.0
0
0
1.0
2.0
3.0
V in , INPUT VOLTAGE (V)
Figure 6. Typical Transfer Characteristics
for Buffered Devices
For these reasons, all unused inputs should be connected
either to V DD or V SS . For applications with inputs going to
edge connectors, a 100 kilohm resistor to V SS should be
used, as well as a series resistor for static protection and
current limiting (Figure 8). The 100 kilohm resistor will help
eliminate any static charges that might develop on the
printed circuit board. See Figure 2 for other possible
protection arrangements.
FROM
EDGE
CONNECTOR
100 k
Figure 7. External Protection
BATTERY BACKUP
RECHARGE
SINGLE INPUT NOR, OR
MULTIPLE INPUT NAND, AND
4.0
5.0
R S
CMOS
DEVICE
CHAPTER 5
5–5
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