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ENABLE 4
RESET 2
STROBE 6
DATA 3
INCREMENT 7
D6 (INTERNAL)
D7 (INTERNAL)
INCREMENT
DATA
STROBE
FULL
RESET
NOTE: Enable in High state.
D n
FULL
ENABLE
* 1.4 V with V DD = 5.0 V
NOTES:
1. High–impedance output state (another device controls bus).
2. Reset in High state.
MC14597B MC14598B
6–514
MC14597B FUNCTION DIAGRAM
TO OTHER
LATCHES
TO OTHER
LATCHES
SEVEN
SELECT
R
3 STAGE COUNTER
AND DECODER
CLK
MC14597B TIMING DIAGRAMS
t WL
t WH
20 ns
90%
t su
t h
t W
t rem
t TLH
90%
90%
1
10%
t PHL
*
*
t WL
V DD
R
D Q
CLK
ONE LATCH
ZERO
SELECT
ADDITIONAL 7 LATCHES
t su
10%
90%
10%
20 ns
t PHL
t THL
10%
V DD
5 FULL
V DD
1 D 0
V SS
15 D1
14 D2
13 D3
12 D4
11 D5
10 D6
9 D7
50%
t W
MOTOROLA CMOS LOGIC DATA
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