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Motorola CMOS Logic Manual page 195

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Figure A illustrates use of the Analog Multiplexer/Demulti-
plexer. The 0–to–5 volt Digital Control signal is used to
directly control a 5 V p–p analog signal.
The digital control logic levels are determined by V DD and
V SS . The V DD voltage is the logic high voltage; the V SS volt-
age is logic low. For the example. V DD = + 5 V = logic high at
the control inputs; V SS = GND = 0 V = logic low.
The maximum analog signal level is determined by V DD
and V SS . The analog voltage must swing neither higher than
V DD nor lower than V SS . The example shows a 5 V p–p signal
ANALOG SIGNAL
+ 5 V
EXTERNAL
0–TO–5 V DIGITAL
CMOS
CONTROL SIGNALS
DIGITAL
CIRCUITRY
MOTOROLA CMOS LOGIC DATA
APPLICATIONS INFORMATION
+ 5 V
V DD
5 V p–p
SWITCH
I/O
MC14067B
MC14097B
Figure A. Application Example
V DD
D X
SWITCH
I/O
D X
V SS
Figure B. External Germanium or Schottky Clipping Diodes
which allows no margin at either peak. If voltage transients
above V DD and/or below V SS are anticipated on the analog
channels, external diodes (D x ) are recommended as shown
in Figure B. These diodes should be small signal types able
to absorb the maximum anticipated current surges during
clipping.
The absolute maximum potential difference between V DD
and V SS is 18.0 volts. Most parameters are specified up to
15 V which is the recommended maximum difference
between V DD and V SS .
V SS
5 V p–p
COMMON
O/I
ANALOG SIGNAL
V DD
D X
COMMON
O/I
D X
V SS
+ 5.0 V
+ 2.5 V
GND
MC14067B MC14097B
6–157

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