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V DD
A
B
C
D
INH
R L
V in
20 ns
20 ns
90%
V in
50%
t PLH
t PHL
V out
Figure 3. Propagation Delay Test Circuit
and Waveforms V in to V out
A, B, and C inputs used to turn ON or OFF
the switch under test.
A
B
C
D
INH
R L
V in
Figure 5. Bandwidth and Off–Channel
Feedthrough Attenuation
MOTOROLA CMOS LOGIC DATA
V out
C L = 50 pF
V DD
10%
V SS
50%
V out
C L = 50 pF
A
B
V C
C
D
INH
Figure 7. Crosstalk, Control to Common O/I
V C
A
PULSE
B
GENERATOR
C
D
INH
V DD V SS V SS V DD
20 ns
V C
V out
50%
t PZH , t PZL
V out
50%
Figure 4. Turn–On and Delay Turn–Off
Test Circuit and Waveforms
V DD
A
B
ON
C
D
OFF
INH
V in
Figure 6. Channel Separation
(Adjacent Channels Used for Setup)
V out
R L
C L = 50 pF
R1
V out
C L = 50 pF
R L
V in
V X
20 ns
90%
50%
10%
90%
V in = V DD
V X = V SS
t PHZ , t PLZ
V in = V SS
10%
V X = V DD
R L
V out
C L = 50 pF
R L
MC14067B MC14097B
6–155
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