Motorola CMOS Logic Manual page 479

SUMMARY
The concepts of binary code representations for decimal
numbers, addition, and complement subtraction were dis-
cussed in detail. Using the basic Adder and Complementer
MSI blocks, adder/subtracters for both signed and unsigned
numbers were illustrated with examples.
LSD
C in
C
ADD/SUBTRACT
("1"/"0")
MOTOROLA CMOS LOGIC DATA
A1 B1
BASIC C in
C out
SUBTRACT
C
BLOCK
R1
1/6 MC14572
1/6 MC14572
Typical Add/Subtract Time = 0.6 + 0.4 n µs
where n = Number of Decades
Figure 7. Adder/Subtracter for Unsigned NBCD Numbers
REFERENCES
1. Chu, Y.: Digital Computer Design Fundamentals , New
York, McGraw–Hill, 1962.
2. McMOS Handbook , Motorola Inc., 1st Edition.
3. Beuscher, H.: Electronic Switching Theory and Circuits ,
New York, Van Nostrand Reinhold, 1971.
4. Garrett, L.: CMOS May Help Majority Logic Win De-
signer's Vote, Electronics , July 19, 1973.
5. Richards, R.: Digital Design , New York, Wiley–
Interscience, 1971.
A2 B2
MSD
C in
C out
C
R2
OVERFLOW = "1"
UNDERFLOW = "1"
(NEGATIVE RESULT)
A n B n
C out
R n
MC14560B
6–441