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Motorola CMOS Logic Manual page 522

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
4 x 4 Multiport Register
The MC14580B is a 4 by 4 multiport register useful in small scratch pad
memories, arithmetic operations when coupled with an adder, and other data
storage applications. It allows independent reading of any two words (or the
same word at both outputs) while writing into any one of four words.
Address changing and data entry occur on the rising edge of the clock.
When the write enable input is low, the contents of any word may be
accessed but not altered.
No Restrictions on Clock Input Rise or Fall Times
3–State Outputs
Single Phase Clocking
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or one Low–power
Schottky TTL Load Over the Rated Temperature Range
Pin Compatible with CD40108
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
MAXIMUM RATINGS*
(Voltages Referenced to V SS )
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Symbol
Parameter
V DD
DC Supply Voltage
V in , V out
Input or Output Voltage (DC or Transient)
I in , I out
Input or Output Current (DC or Transient),
per Pin
P D
Power Dissipation, per Package†
T stg
Storage Temperature
T L
Lead Temperature (8–Second Soldering)
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic "P and D/DW" Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C
Ceramic "L" Packages: – 12 mW/ _ C From 100 _ C To 125 _ C
16
CLOCK
15
WE
20
D0
19
19
DATA
D1
18
D2
INPUT
17
D3
MC14580B
6–484
– 0.5 to + 18.0
– 0.5 to V DD + 0.5
– 65 to + 150
BLOCK DIAGRAM
W0
W1
R0 A
R1 A
R0 B
R1 B
8
9
13
14
11
10
DECODER
3–STATE A
Q0 A
Q1 A
Q2 A
Q3 A
4 X 4
MEMORY
Q0 B
Q1 B
Q2 B
Q3 B
V DD = PIN 24
3–STATE B
V SS = PIN 12
Value
Unit
V
V
10
mA
500
mW
_ C
_ C
260
3
4
5
WORD A
6
OUTPUT
7
22
23
WORD B
2
OUTPUT
1
21
MC14580B
L SUFFIX
CERAMIC
CASE 623
P SUFFIX
PLASTIC
CASE 709
DW SUFFIX
SOIC
CASE 751E
ORDERING INFORMATION
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBDW
SOIC
T A = – 55 to 125 C for all packages.
PIN ASSIGNMENT
Q3 B
1
24
V DD
Q2 B
2
23
Q1 B
3–STATE A
3
22
Q0 B
Q0 A
4
21
3–STATE B
Q1 A
5
20
D0
Q2 A
6
19
D1
Q3 A
7
18
D2
WRITE 0
8
17
D3
WRITE 1
9
16
CLOCK
READ 1 B
10
15
WE
READ 0 B
11
14
READ 1 A
V SS
12
13
READ 0 A
MOTOROLA CMOS LOGIC DATA

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