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Motorola CMOS Logic Manual page 409

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RETRIGGER OPERATION
The MC14538B is retriggered if a valid trigger occurs
lowed by another valid trigger
returned to the quiescent (zero) state. Any retrigger, after the
timing node voltage at pin 2 or 14 has begun to rise from
V ref 1 , but has not yet reached V ref 2 , will cause an increase
in output pulse width T. When a valid retrigger is initiated
the voltage at C X /R X will again drop to V ref 1 before
progressing along the RC charging curve toward V DD . The Q
output will remain high until time T, after the last valid retrig-
ger.
RESET OPERATION
The MC14538B may be reset during the generation of the
output pulse. In the reset mode of operation, an input pulse
on Reset sets the reset latch and causes the capacitor to be
fast charged to V DD by turning on transistor P1 . When the
voltage on the capacitor reaches V ref 2 , the reset latch will
clear, and will then be ready to accept another pulse. It the
Reset input is held low, any trigger inputs that occur will be
inhibited and the Q and Q outputs of the output latch will not
C x
V SS
RESET
Figure 11. Use of a Diode to Limit
Power Down Current Surge
MOTOROLA CMOS LOGIC DATA
fol-
before the Q output has
,
D x
V DD
R x
V DD
Q
Q
change. Since the Q output is reset when an input low level is
detected on the Reset input, the output pulse T can be made
significantly shorter than the minimum pulse width specifi-
cation.
POWER–DOWN CONSIDERATIONS
Large capacitance values can cause problems due to the
large amount of energy stored. When a system containing
the MC14538B is powered down, the capacitor voltage may
discharge from V DD through the standard protection diodes
at pin 2 or 14. Current through the protection diodes should
be limited to 10 mA and therefore the discharge time of the
V DD supply must not be faster than (V DD ). (C) / (10 mA). For
example, if V DD = 10 V and C X = 10 µF, the V DD supply
should discharge no faster than (10 V) x (10 µF) / (10 mA) =
10 ms. This is normally not a problem since power supplies
are heavily filtered and cannot discharge at this rate.
When a more rapid decrease of V DD to zero volts occurs,
the MC14538B can sustain damage. To avoid this possibility
use an external clamping diode, D X , connected as shown in
Fig. 11.
PIN ASSIGNMENT
V SS
C X /R X A
RESET A
A A
B A
Q A
Q A
V SS
1
16
V DD
2
15
V SS
3
14
C X /R X B
4
13
RESET B
5
12
A B
6
11
B B
7
10
Q B
8
9
Q B
MC14538B
6–371

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