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SCANNER
CLOCK
SCANNER
RESET
DS1
DS2
DS3
DS4
DS5
NOTE: If Mode B = 1, the first decade is inhibited and S1 will not go high, and the cycle will be
shortened to four stages.
DS5 is selected automatically when Scanner Reset goes high.
RESET
CLOCK A
CLOCK B
ERROR
OUT
NOTE: Error detector looks for inverted pulse on Clock B. Whenever a positive edge at
1000
500
300
100
50
30
10
5.0
3.0
SKEW IN THIS RANGE
RESULTS IN NO ERROR
COUNTED.
1.0
3.0
5.0
7.0
9.0
MC14534B
6–352
SCANNER TIMING DIAGRAM
THOUSANDS
TEN
THOUSANDS
ERROR DETECTION TIMING DIAGRAM
ERROR
1
GOOD PULSE
Clock A is not accompanied by a negative pulse at Clock B (or vice–versa) within
a time period of the one–shots an error is counted. Three errors result in Error Out
to go to a "1". If error detection is not needed, tie Clock B high or low and leave
Pins 1 and 22 unconnected.
CLOCK SKEW RANGE
SKEW IN THIS RANGE
RESULTS IN COUNTED
ERROR.
MAX
SKEW IN THIS RANGE
MAY OR MAY NOT
TYP
RESULT IN COUNTED
ERROR.
MIN
11
13
15
17
V DD (Vdc)
TENS
HUNDREDS
ERROR
2
GOOD PULSE
ERROR
3
NOTES:
1. The skew is the time difference between the
low–to–high transition of C A to the high–to–
low transition of C B or vice–versa. Capacitors
C1 = C22 tied from pins 1 and 22 to V SS .
2. This graph is accurate for C1 = C22 100 pF.
3. When the error detection circuitry in not used,
pins 1 and 22 are left open.
MOTOROLA CMOS LOGIC DATA
UNITS
ERROR
4
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