Write Protection (Wrp) - ST STM32L4 5 Series Reference Manual

RM0351
For example, to protect by PCROP from the address 0x0806 2F80 (included) to the address
0x0807 0004 (included):
•
if boot in flash is done in Bank 1, FLASH_PCROP1SR and FLASH_PCROP1ER
registers must be programmed with:
–
–
• If the two banks are swapped, the protection must apply to bank 2, and
FLASH_PCROP2SR and FLASH_PCROP2ER register must be programmed with:
–
–
Any read access performed through the D-bus to a PCROP protected area will trigger
RDERR flag error.
Any PCROP protected address is also write protected and any write access to one of these
addresses will trigger WRPERR.
Any PCROP area is also erase protected. Consequently, any erase to a page in this zone is
impossible (including the page containing the start address and the end address of this
zone). Moreover, a software mass erase cannot be performed if one zone is PCROP
protected.
For previous example, due to erase by page, all pages from page 0xC5 to 0xE0 are
protected in case of page erase. (All addresses from 0x0806 2800 to 0x0807 07FF can't be
erased).
Deactivation of PCROP can only occurs when the RDP is changing from level 1 to level 0. If
the user options modification tries to clear PCROP or to decrease the PCROP area, the
options programming is launched but PCROP area stays unchanged. On the contrary, it is
possible to increase the PCROP area.
When option bit PCROP_RDP is cleared, when the RDP is changing from level 1 to level 0,
Full Mass Erase is replaced by Partial Mass Erase in order to keep the PCROP area (refer
to Changing the Read protection
PCROP1/2_END are also not erased.
Note: It is recommended to align PCROP area with page granularity when using PCROP_RDP, or
to leave free the rest of the page where PCROP zone starts or ends.
3.5.3

Write protection (WRP)

The user area in Flash memory can be protected against unwanted write operations. Two
write-protected (WRP) areas can be defined in each bank, with page (2 KByte) granularity.
Each area is defined by a start page offset and an end page offset related to the physical
Flash bank base address. These offsets are defined in the WRP address registers:
Bank 1 WRP area A address register
address register
(FLASH_WRP2AR),
The Bank "x" WRP "y" area (x=1,2 and y=A,B) is defined from the address: Bank "x" Base
address + [WRPxy_STRT x 0x800] (included) to the address: Bank "x" Base address +
[(WRPxy_END+1) x 0x800] (excluded).
PCROP1_STRT = 0xC5F0.
PCROP1_END = 0xE000.
PCROP2_STRT = 0xC5F0.
PCROP2_END = 0xE000.
(FLASH_WRP1BR),
Flash Bank 2 WRP area B address register
DocID024597 Rev 5
Embedded Flash memory (FLASH)
level). In this case, PCROP1/2_STRT and
(FLASH_WRP1AR),
Flash Bank 2 WRP area A address register
Flash Bank 1 WRP area B
(FLASH_WRP2BR).
Flash
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