Figure 75. Analog To Digital Conversion Time - ST STM32L4 5 Series Reference Manual

RM0351
18.4.16 Timing
The elapsed time between the start of a conversion and the end of conversion is the sum of
the configured sampling time plus the successive approximation time depending on data
resolution:
T
CONV
T
CONV
1. T
SMPL
2. T depends on RES[2:0]
SAR
18.4.17 Stopping an ongoing conversion (ADSTP, JADSTP)
The software can decide to stop regular conversions ongoing by setting ADSTP=1 and
injected conversions ongoing by setting JADSTP=1.
Stopping conversions will reset the ongoing ADC operation. Then the ADC can be
reconfigured (ex: changing the channel selection or the trigger) ready for a new operation.
Note that it is possible to stop injected conversions while regular conversions are still
operating and vice-versa. This allows, for instance, re-configuration of the injected
conversion sequence and triggers while regular conversions are still operating (and vice-
versa).
When the ADSTP bit is set by software, any ongoing regular conversion is aborted with
partial result discarded (ADC_DR register is not updated with the current conversion).
When the JADSTP bit is set by software, any ongoing injected conversion is aborted with
partial result discarded (ADC_JDRy register is not updated with the current conversion).
The scan sequence is also aborted and reset (meaning that relaunching the ADC would re-
start a new sequence).
Once this procedure is complete, bits ADSTP/ADSTART (in case of regular conversion), or
JADSTP/JADSTART (in case of injected conversion) are cleared by hardware and the
software must poll ADSTART (or JADSTART) until the bit is reset before assuming the ADC
is completely stopped.
= T + T = [ 2.5
SMPL SAR
= T + T = 31.25 ns
SMPL SAR

Figure 75. Analog to digital conversion time

depends on SMP[2:0]
DocID024597 Rev 5
+ 12.5 ] x T
|min |12bit ADC_CLK
+ 156.25 ns
|min |12bit
Analog-to-digital converters (ADC)
= 187.5 ns (for F
ADC_CLK
= 80 MHz)
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