ST STM32L4 5 Series Reference Manual page 738

Digital filter for sigma delta modulators (DFSDM)
Bit 5 SCDIE: Short-circuit detector interrupt enable
0: short-circuit detector interrupt is disabled
1: short-circuit detector interrupt is enabled
Please see the explanation of SCDF[7:0] in DFSDM_FLTxISR.
Note: SCDIE is present only in DFSDM_FLT0CR2 register (filter x=0)
Bit 4 AWDIE: Analog watchdog interrupt enable
0: Analog watchdog interrupt is disabled
1: Analog watchdog interrupt is enabled
Please see the explanation of AWDF in DFSDM_FLTxISR.
Bit 3 ROVRIE: Regular data overrun interrupt enable
0: Regular data overrun interrupt is disabled
1: Regular data overrun interrupt is enabled
Please see the explanation of ROVRF in DFSDM_FLTxISR.
Bit 2 JOVRIE: Injected data overrun interrupt enable
0: Injected data overrun interrupt is disabled
1: Injected data overrun interrupt is enabled
Please see the explanation of JOVRF in DFSDM_FLTxISR.
Bit 1 REOCIE: Regular end of conversion interrupt enable
0: Regular end of conversion interrupt is disabled
1: Regular end of conversion interrupt is enabled
Please see the explanation of REOCF in DFSDM_FLTxISR.
Bit 0 JEOCIE: Injected end of conversion interrupt enable
0: Injected end of conversion interrupt is disabled
1: Injected end of conversion interrupt is enabled
Please see the explanation of JEOCF in DFSDM_FLTxISR.
24.8.3 DFSDM interrupt and status register (DFSDM_FLTxISR)
Address offset: 0x108 + 0x80 * x, x = 0...3
Reset value: 0x00FF 0000
31 30 29
r r r
15 14 13
Res. RCIP JCIP Res.
r r
738/1830
28 27 26 25
SCDF[7:0]
r r r r
12 11 10 9
Res. Res. Res.
DocID024597 Rev 5
24 23 22 21
r r r r
8 7 6 5
Res. Res. Res. Res.
20 19 18 17
CKABF[7:0]
r r r
4 3 2
AWDF ROVRF JOVRF REOCF JEOCF
r r r
RM0351
16
r r
1 0
r r