ST STM32L4 5 Series Reference Manual page 44

Advanced arm-based 32-bit mcus
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47.11.1 Peripheral FIFO architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1640
47.11.2 Host FIFO architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1641
47.11.3 FIFO RAM allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1642
47.12 OTG_FS system performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1644
47.13 OTG_FS interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1644
47.14 OTG_FS control and status registers . . . . . . . . . . . . . . . . . . . . . . . . . . 1646
47.14.1 CSR memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1646
47.15 OTG_FS registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1650
47.15.1 OTG control and status register (OTG_GOTGCTL) . . . . . . . . . . . . . 1650
47.15.2 OTG interrupt register (OTG_GOTGINT) . . . . . . . . . . . . . . . . . . . . . 1653
47.15.3 OTG AHB configuration register (OTG_GAHBCFG) . . . . . . . . . . . . . 1654
47.15.4 OTG USB configuration register (OTG_GUSBCFG) . . . . . . . . . . . . . 1655
47.15.5 OTG reset register (OTG_GRSTCTL) . . . . . . . . . . . . . . . . . . . . . . . . 1657
47.15.6 OTG core interrupt register (OTG_GINTSTS) . . . . . . . . . . . . . . . . . . 1659
47.15.7 OTG interrupt mask register (OTG_GINTMSK) . . . . . . . . . . . . . . . . . 1664
47.15.8 OTG_FS Receive status debug read/OTG status read and
47.15.9 OTG Receive FIFO size register (OTG_GRXFSIZ) . . . . . . . . . . . . . . 1668
47.15.10 OTG Host non-periodic transmit FIFO size register
47.15.11 OTG non-periodic transmit FIFO/queue status register
47.15.12 OTG general core configuration register (OTG_GCCFG) . . . . . . . . . 1671
47.15.13 OTG core ID register (OTG_CID) . . . . . . . . . . . . . . . . . . . . . . . . . . . 1672
47.15.14 OTG core LPM configuration register (OTG_GLPMCFG) . . . . . . . . . 1673
47.15.15 OTG power down register (OTG_GPWRDN) . . . . . . . . . . . . . . . . . . 1676
47.15.16 OTG ADP timer, control and status register
47.15.17 OTG Host periodic transmit FIFO size register
47.15.18 OTG device IN endpoint transmit FIFO size register
47.15.19 Host-mode registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1680
47.15.20 OTG Host configuration register (OTG_HCFG) . . . . . . . . . . . . . . . . . 1680
47.15.21 OTG Host frame interval register (OTG_HFIR) . . . . . . . . . . . . . . . . . 1681
47.15.22 OTG Host frame number/frame time remaining register
44/1830
pop registers (OTG_GRXSTSR/OTG_GRXSTSP) . . . . . . . . . . . . . . 1667
(OTG_HNPTXFSIZ)/Endpoint 0 Transmit FIFO size
(OTG_DIEPTXF0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1669
(OTG_HNPTXSTS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1670
(OTG_GADPCTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1677
(OTG_HPTXFSIZ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1679
(OTG_DIEPTXFx) (x = 1..5, where x is the
FIFO_number) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1679
(OTG_HFNUM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1682
DocID024597 Rev 5
RM0351

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