ST STM32L4 5 Series Reference Manual page 136

Embedded Flash memory (FLASH)
Table 17. Flash interface - register map and reset values (continued)
Offset Register
FLASH_
WRP1BR
0x30
Reset value
FLASH_
PCROP2SR
0x44
Reset value
FLASH_
PCROP2ER
0x48
Reset value
FLASH_
WRP2AR
0x4C
Reset value
FLASH_
WRP2BR
0x50
Reset value
Refer to
136/1830
X X X X X X X X
X X X X X X X X
X X X X X X X X
Section 2.2.2 on page 75
WRP1B_END[7:0]
X X X X X X X X X X X X X X X X
X X X X X X X X X X X X X X X X
WRP2A_END[7:0]
WRP2B_END[7:0]
for the register boundary addresses.
DocID024597 Rev 5
RM0351
WRP1B_STRT[7:0]
X X X X X X X X
PCROP2_STRT[15:0]
PCROP2_END[15:0]
WRP2A_STRT[7:0]
X X X X X X X X
WRP2B_STRT[7:0]
X X X X X X X X