ST STM32L4 5 Series Reference Manual page 874

Hash processor (HASH)
29.6.7 HASH context swap registers (HASH_CSRx)
These registers contain the complete internal register states of the hash processor. They
are useful when a context swap has to be done because a high-priority task needs to use
the hash processor while it is already used by another task.
When such an event occurs, the HASH_CSRx registers have to be read and the read
values have to be saved in the system memory space. Then the hash processor can be
used by the preemptive task, and when the hash computation is complete, the saved
context can be read from memory and written back into the HASH_CSRx registers.
HASH_CSR0
Address offset: 0x0F8
Reset value: 0x0000 0002
31 30 29
rw rw rw
15 14 13
rw rw rw
HASH_CSRx (x=1 to 53)
Address offset: 0x0F8 + x * 0x4
Reset value: 0x0000 0000
31 30 29
rw rw rw
15 14 13
rw rw rw
874/1830
28 27 26 25
rw rw rw rw
12 11 10 9
rw rw rw rw
28 27 26 25
rw rw rw rw
12 11 10 9
rw rw rw rw
DocID024597 Rev 5
24 23 22 21
CS0
rw rw rw rw
8 7 6 5
CS0
rw rw rw rw
24 23 22 21
CSx
rw rw rw rw
8 7 6 5
CSx
rw rw rw rw
20 19 18 17
rw rw rw rw
4 3 2 1
rw rw rw rw
20 19 18 17
rw rw rw rw
4 3 2 1
rw rw rw rw
RM0351
16
rw
0
rw
16
rw
0
rw