Figure 5. Sequential 16-Bit Instructions Execution - ST STM32L4 5 Series Reference Manual

Advanced arm-based 32-bit mcus

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Embedded Flash memory (FLASH)

Figure 5. Sequential 16-bit instructions execution

When the code is not sequential (branch), the instruction may not be present in the currently

used instruction line or in the prefetched instruction line. In this case (miss), the penalty in

terms of number of cycles is at least equal to the number of wait states.

DocID024597 Rev 5

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