ST STM32L4 5 Series Reference Manual page 507

RM0351
Clock ratio constraint between ADC clock and AHB clock
There are generally no constraints to be respected for the ratio between the ADC clock and
the AHB clock except if some injected channels are programmed. In this case, it is
mandatory to respect the following ratio:
•
F
HCLK
• F
HCLK
with lower resolutions)
•
F
HCLK
Figure 67. ADC clock scheme
>= F / 4 if the resolution of all channels are 12-bit or 10-bit
ADC
>= F / 3 if there are some channels with resolutions equal to 8-bit (and none
ADC
>= F / 2 if there are some channels with resolutions equal to 6-bit
ADC
DocID024597 Rev 5
Analog-to-digital converters (ADC)
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