Table 179. Aes Register Map - ST STM32L4 5 Series Reference Manual

Advanced arm-based 32-bit mcus

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28.14.17 AES

Address offset: 0x040 (AES_SUSP0R) to 0x05C (AES_SUSP7R)

Reset value: 0x0000 0000

These registers contain the complete internal register states of the AES processor when the

GCM/GMAC is selected, and are useful when a suspend has to be done because a high-

priority task has to use the AES processor while it is already in use by another task.

When such an event occurs, the AES_SUSP0..7R registers (when GCM/GMAC is selected)

have to be read and the read values have to be saved somewhere in the memory space.

Then the AES processor can be used by the preemptive task, and when AES computation is

finished, the saved context can be read from memory and written back into their

corresponding suspend registers.

These registers are used only when GCM/GMAC algorithm mode is selected.

These registers can only be read when AES is enabled (Bit [0] set to 1 in AES_CR register), else

reading these registers while AES is disabled will return the value 0x00000000.

28.14.18 AES register map

Advanced encryption standard hardware accelerator (AES)

registers (AES_SUSPxR) (x = 0..7)

Table 179. AES register map

AES_DINR[31:0]

AES_DOUTR[31:0]

AES_KEYR0[31:0]

AES_KEYR1[31:0]

AES_KEYR2[31:0]

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