ST STM32L4 5 Series Reference Manual page 827

RM0351
the size of the header on 64 bits and the size of the payload on 64 bits. During computation
we have to distinguish between the blocks of the header and the blocks of the payload.
Header
•
protected (such as information for routing the packet)
Payload
•
In GCM mode the user must follow 4 phases: GCM Init, GCM header, GCM payload, GCM
final.
•
GCM init phase: in this first step, the hash key is calculated and saved internally for
use during the processing of all the blocks.
a)
b)
c)
d)
e)
f)
g)
h)
•
GCM header phase: To be performed after the GCM init phase.
i)
j)
k)
l)
m) Erase CCF by setting the bit CCFC in AES_CR register.
n)
•
GCM payload phase (encryption / decryption): This step is after GCM_header
phase.
o)
p)
q)
r)
s)
Advanced encryption standard hardware accelerator (AES)
(aka additional authentication data): data which is authenticated but not
(aka plaintext / ciphertext): the message itself which is protected.
Make sure that the AES core is disabled by clearing EN (AES_CR).
Select GCM chaining mode by programming CHMOD[1:0] = 011 in AES_CR.
Configure GCMPH[1:0] = 00 in AES_CR to indicate GCM init phase and force
DATATYPE[1:0] = 00 (No swapping) in AES_CR.
Select mode by selecting either MODE[1:0]= 00 for encryption or MODE[1:0] = 10
for decryption in AES_CR register.
Initialize the key registers (128/256 bits) in AES_KEYRx and IV.
Set EN bit in AES_CR register to 1 to start the calculation of the hash key. EN is
automatically reset when the calculation finishes.
Wait until the CCF flag in AES_SR register is set to 1 (or use the corresponding
interrupt) before moving on to the next phase.
Erase the CCF flag by setting CCFC in AES_CR.
Set GCMPH="01" in AES_CR register to indicate that we are in the header phase
and configure DATATYPE[1:0] (1-bit, 8-bits, 16-bits or 32-bits) in AES_CR
Enable the AES by setting EN bit in AES_CR register.
Write 4 times the header message into AES_DINR register.
Wait until the computation flag CCF in AES_SR register is set to 1 (or use the
corresponding interrupt).
Repeat (k), (l), and (m) until each of the header blocks is inserted. Alternatively,
DMA may be used.
Choose the combination 10 of GCMPH in AES_CR register.
Write 4 times the payload message into AES_DINR register.
Wait until the computation flag CCF in AES_SR is set to 1 (or use the
corresponding interrupt).
Erase CCF flag by writing 1 in CCFC bit (AES_CR). This must be done before
inserting the next block.
Read AES_DOUTR 4 times to get the (ciphertext / plaintext). This is compulsory
before starting a new block.
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