Table 86. Fmc_Bcrx Bit Fields; Figure 50. Muxed Write Access Waveforms - ST STM32L4 5 Series Reference Manual

Advanced arm-based 32-bit mcus
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RM0351
The difference with ModeD is the drive of the lower address byte(s) on the data bus.
Bit number
31:22
21
20
19
18:16
15
14
13
12
11
10
9
8
7
6
5:4

Figure 50. Muxed write access waveforms

Table 86. FMC_BCRx bit fields

Bit name
Reserved
0x000
As needed (this bit is reserved for STM32L475xx/476xx/486xx
WFDIS
devices)
CCLKEN
As needed
CBURSTRW
0x0 (no effect in asynchronous mode)
CPSIZE
0x0 (no effect in asynchronous mode)
ASYNCWAIT
Set to 1 if the memory supports this feature. Otherwise keep at 0.
EXTMOD
0x0
WAITEN
0x0 (no effect in asynchronous mode)
WREN
As needed
WAITCFG
Don't care
Reserved
0x0
WAITPOL
Meaningful only if bit 15 is 1
BURSTEN
0x0
Reserved
0x1
FACCEN
0x1
MWID
As needed
DocID024597 Rev 5
Flexible static memory controller (FSMC)
Value to set
441/1830
471

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