Figure 91. Flushing Jsqr Queue Of Context By Setting Addis=1 (Jqm=1) - ST STM32L4 5 Series Reference Manual

Analog-to-digital converters (ADC)

Figure 91. Flushing JSQR queue of context by setting ADDIS=1 (JQM=1)

1. Parameters:
P1: sequence of 1 conversion, hardware trigger 1
P2: sequence of 1 conversion, hardware trigger 1
P3: sequence of 1 conversion, hardware trigger 1
Queue of context: Starting the ADC with an empty queue
The following procedure must be followed to start ADC operation with an empty queue, in
case the first context is not known at the time the ADC is initialized. This procedure is only
applicable when JQM bit is reset:
5. Write a dummy JSQR with JEXTEN not equal to 0 (otherwise triggering a software
conversion)
6. Set JADSTART
7. Set JADSTP
8. Wait until JADSTART is reset
9. Set JADSTART.
Disabling the queue
It is possible to disable the queue by setting bit JQDIS=1 into the ADC_CFGR register.
18.4.22 Programmable resolution (RES) - fast conversion mode
It is possible to perform faster conversion by reducing the ADC resolution.
The resolution can be configured to be either 12, 10, 8, or 6 bits by programming the control
bits RES[1:0].
format with respect to the resolution as well as to the data alignment.
Lower resolution allows faster conversion time for applications where high-data precision is
not required. It reduces the conversion time spent by the successive approximation steps
according to
536/1830
Figure 96, Figure 97,
Table 109.
DocID024597 Rev 5
Figure 98 and Figure 99 show the conversion result
RM0351