Table 185. Behavior Of Timer Outputs Versus Brk/Brk2 Inputs; Figure 257. Pwm Output State Following Brk And Brk2 Pins Assertion (Ossi=1) - ST STM32L4 5 Series Reference Manual

Advanced-control timers (TIM1/TIM8)
The two break inputs have different behaviors on timer outputs:
–
–
The BRK has a higher priority than BRK2 input, as described in
Note: BRK2 must only be used with OSSR = OSSI = 1.
BRK
Active
Inactive
Figure 257
BRK and BRK2 inputs. In this case, both outputs have active high polarities (CCxP =
CCxNP = 0 in TIMx_CCER register).

Figure 257. PWM output state following BRK and BRK2 pins assertion (OSSI=1)

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The BRK input can either disable (inactive state) or force the PWM outputs to a
predefined safe state.
BRK2 can only disable (inactive state) the PWM outputs.

Table 185. Behavior of timer outputs versus BRK/BRK2 inputs

Timer outputs
BRK2
– Inactive then
forced output
state (after a
deadtime)
X
– Outputs disabled
if OSSI = 0
(control taken
over by GPIO
logic)
Active
gives an example of OCx and OCxN output behavior in case of active signals on
DocID024597 Rev 5
OCxN output
state
(low side switches)
ON after deadtime
insertion
Inactive
Table 185.
Typical use case
OCx output
(high side switches)
OFF
RM0351
OFF
OFF