Table 89. Fmc_Btrx Bit Fields - ST STM32L4 5 Series Reference Manual

Flexible static memory controller (FSMC)
Bit number
10
9
8
7
6
5-4
3-2
1
0
Bit number
31:30
29:28
27-24
27-24
23-20
19-16
15-8
7-4
3-0
448/1830
Table 88. FMC_BCRx bit fields (continued)
Bit name
Reserved 0x0
WAITPOL To be set according to memory
BURSTEN 0x1
Reserved 0x1
FACCEN Set according to memory support (NOR Flash memory)
MWID As needed
MTYP 0x1 or 0x2
MUXEN As needed
MBKEN 0x1

Table 89. FMC_BTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x0
DATLAT Data latency
DATLAT Data latency
0x0 to get CLK = HCLK (Not supported)
CLKDIV 0x1 to get CLK = 2 × HCLK
..
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK).
DATAST Don't care
ADDHLD Don't care
ADDSET Don't care
DocID024597 Rev 5
Value to set
Value to set
RM0351