ST STM32L4 5 Series Reference Manual page 642

Advanced arm-based 32-bit mcus
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Digital-to-analog converter (DAC)
Bits 31:21 Reserved, must be kept at reset value.
Bits 20:16 OTRIM2[4:0]: DAC Channel 2 offset trimming value
Bits 15:5 Reserved, must be kept at reset value.
Bits 4:0 OTRIM1[4:0]: DAC Channel 1 offset trimming value
19.5.16
DAC mode control register (DAC_MCR)
Address offset: 0x3C
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:19 Reserved, must be kept at reset value.
642/1830
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
DocID024597 Rev 5
24
23
22
21
Res.
Res.
Res.
Res.
8
7
6
5
Res.
Res.
Res.
Res.
20
19
18
17
Res.
Res.
MODE2[2:0]
rw
4
3
2
1
Res.
Res.
MODE1[2:0]
rw
RM0351
16
0

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