ST STM32L4 5 Series Reference Manual page 241

RM0351
31 30 29
DAC1 PWR
LPTIM1 OPAMP
RST RST
RST RST
rw rw rw
15 14 13
SPI3 SPI2
Res. Res.
RST RST
rw rw
Bit 31 LPTIM1RST: Low Power Timer 1 reset
Bit 30 OPAMPRST: OPAMP interface reset
Bit 29 DAC1RST: DAC1 interface reset
Bit 28 PWRRST: Power interface reset
Bit 27 Reserved, must be kept at reset value.
Bit 26 CAN2RST: CAN2 reset (This bit is reserved for STM32L475xx/476xx/486xx devices)
0: No effect
1: Reset CAN2
Bit 25 CAN1RST: CAN1 reset
Bit 24 CRSRST: CRS reset (This bit is reserved for STM32L475xx/476xx/486xx devices)
Bit 23 I2C3RST: I2C3 reset
Bit 22 I2C2RST: I2C2 reset
28 27 26 25
CAN1
CAN2R
Res.
ST
RST
rw rw rw
12 11 10 9
LCD
Res. Res.
RST
rw
Set and cleared by software.
0: No effect
1: Reset LPTIM1
Set and cleared by software.
0: No effect
1: Reset OPAMP interface
Set and cleared by software.
0: No effect
1: Reset DAC1 interface
Set and cleared by software.
0: No effect
1: Reset PWR
Set and cleared by software
Set and reset by software.
0: No effect
1: Reset the CAN1
Set and cleared by software.
0: No effect
1: Reset the CRS
Set and reset by software.
0: No effect
1: Reset I2C3
Set and cleared by software.
0: No effect
1: Reset I2C2
24 23 22
I2C2
CRSRS I2C3R
T ST
RST
rw rw
8 7 6
Res. Res. Res.
DocID024597 Rev 5
Reset and clock control (RCC)
21 20 19 18
I2C1 UART5 UART4 USART3
RST RST RST RST
rw rw rw rw
5 4 3 2
TIM7 TIM6 TIM5 TIM4
RST RST RST RST
rw rw rw rw
17 16
USART2
Res.
RST
rw
1 0
TIM3 TIM2
RST RST
rw rw
241/1830
278