Figure 228. Counter Timing Diagram, Internal Clock Divided By N; Figure 229. Counter Timing Diagram, Update Event With Arpe=1 (Counter Underflow) - ST STM32L4 5 Series Reference Manual

Advanced-control timers (TIM1/TIM8) RM0351

Figure 228. Counter timing diagram, internal clock divided by N

Figure 229. Counter timing diagram, update event with ARPE=1 (counter underflow)

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