Table of Contents
Advertisement
Theory of Operation
3.10
Gate Array
The gate array contains the hardware logic for dot firing, monitoring
changes in the Carriage position, controlling DMA (Direct Memory
Access) through the parallel port, and generating the PWM (Pulse
Width Modulation) waveforms for the servo.
The gate array is a Xilinx device.
programmable gate array. This means that the logic that it implements
is determined by configuration information in internal RAM storage.
Each time power is turned on, this information must be downloaded
from the system ROM. This type of gate array allows for the flexibility
of upgrading the logic by upgrading the system software.
The
XDONE
a high impedance state until its programming is complete.
2-12
Figure Chapter 2 .2: Gate Array
signal is held low by the gate array and all its outputs are in
It is a static RAM based field
CADJET 2
Advertisement
Table of Contents
