Keithley 2651A Reference Manual page 617

Model 2651A High Power System SourceMeter® Instrument Reference Manual
B7 B6
** >
1 0
* Least significant bit
** Most significant bit
For information about .condition, .enable, .event, .ntr, and .ptr registers, refer to
2) and Enable and transition registers
meanings:
Bit Value
B0
status.MEASUREMENT_SUMMARY_BIT
status.MSB
B1
status.SYSTEM_SUMMARY_BIT
status.SSB
B2
status.ERROR_AVAILABLE
status.EAV
B3
status.QUESTIONABLE_SUMMARY_BIT
status.QSB
B4
status.MESSAGE_AVAILABLE
status.MAV
B5
status.EVENT_SUMMARY_BIT
status.ESB
B6 Not used.
B7
status.OPERATION_SUMMARY_BIT
status.OSB
As an example, to set bit B0 of the service request enable register, set status.request_enable =
status.MSB.
In addition to the above values, requestSRQEnableRegister can be set to the numeric equivalent of the bit
to set. To set more than one bit of the register, set requestSRQEnableRegister to the sum of their decimal
weights. For example, to set bits B0 and B7, set requestSRQEnableRegister to 129 (1 + 128).
Bit
Binary value
Decimal
Weights
Example 1
requestSRQEnableRegister = status.MSB +
status.OSB
status.request_enable = requestSRQEnableRegister
2651A-901-01 Rev. A / March 2011
B5 B4 B3
> > >
0 0 0
(on page E-18). The individual bits of this register have the following
B7 B6
0/1 0/1
128 64
7 6
(2 ) (2 )
B2 B1 B0
> > *
0 0 1
Description
Set summary bit indicates that an enabled event in the
Measurement Event Register has occurred.
Bit B0 decimal value: 1
Set summary bit indicates that an enabled event in the
System Summary Register has occurred.
Bit B1 decimal value: 2
Set summary bit indicates that an error or status message
is present in the Error Queue.
Bit B2 decimal value: 4
Set summary bit indicates that an enabled event in the
Questionable Status Register has occurred.
Bit B3 decimal value: 8
Set summary bit indicates that a response message is
present in the Output Queue.
Bit B4 decimal value: 16
Set summary bit indicates that an enabled event in the
Standard Event Status Register has occurred.
Bit B5 decimal value: 32
Not applicable.
Set summary bit indicates that an enabled event in the
Operation Status Register has occurred.
Bit B7 decimal value: 128
B5 B4 B3
0/1 0/1 0/1
32 16 8
5 4 3
(2 ) (2 ) (2 )
Sets the MSB and OSB bits of the
service request (SRQ) enable register
using constants.
Section 7: Command reference
Status register sets (on page E-
B2 B1 B0
0/1 0/1 0/1
4 2 1
2 1 0
(2 ) (2 ) (2 )
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