Status.operation.trigger_Overrun - Keithley 2651A Reference Manual

Section 7: Command reference

status.operation.trigger_overrun.*

This attribute contains the operation status trigger overrun summary register set.
Type TSP-Link accessible
Attribute - -
.condition (R) Yes
.enable (RW) Yes
.event (R) Yes
.ntr (RW) Yes
.ptr (RW) Yes
Usage
operationRegister = status.operation.trigger_overrun.condition
operationRegister = status.operation.trigger_overrun.enable
operationRegister = status.operation.trigger_overrun.event
operationRegister = status.operation.trigger_overrun.ntr
operationRegister = status.operation.trigger_overrun.ptr
status.operation.trigger_overrun.enable = operationRegister
status.operation.trigger_overrun.ntr = operationRegister
status.operation.trigger_overrun.ptr = operationRegister
operationRegister
Details
These attributes are used to read or write to the operation status trigger overrun summary registers. Reading a
status register returns a value. The binary equivalent of the returned value indicates which register bits are set.
The least significant bit of the binary number is Bit B0, and the most significant bit is Bit B15. For example, if a
value of 1.02600e+03 (which is 1026) is read as the value of the condition register, the binary equivalent is
0000 0100 0000 0010. This value indicates that bit B1 and bit B10 are set.
B15 B14
** >
0 0
* Least significant bit
** Most significant bit
The bits in this register summarize events in other registers. A set bit in this summary register indicates that an
enabled event in one of the summarized registers is set.
For information about .condition, .enable, .event, .ntr, and .ptr registers, refer to
2) and Enable and transition registers
meanings:
7-296
Model 2651A High Power System SourceMeter® Instrument Reference Manual
Affected by
- -
Not applicable
Status reset
Status reset
Status reset
Status reset
The operation status trigger overrun summary register's status. A zero (0) indicates
no bits set (also send 0 to clear all bits); other values indicate various bit settings
B13 B12 B11 B10
> > > >
0 0 0 1
(on page E-18). The individual bits of this register have the following
Where saved
- -
Not saved
Not saved
Not saved
Not saved
Not saved
B9 B8 B7 B6
> > > >
0 0 0 0
Default value
- -
Not applicable
0
0
0
31,746 (All bits set)
B5 B4 B3 B2
> > > >
0 0 0 0
Status register sets
2651A-901-01 Rev. A / March 2011
B1 B0
> *
1 0
(on page E-