8.2.10 Binary-Coded Decimal Operations
The binary-coded decimal operations table indicates the number of clock periods needed
for the processor to perform the specified operation using the given addressing modes,
with complete execution times given. No additional tables are needed to calculate total
effective execution time for these instructions. The total number of clock cycles is outside
the parentheses; the number of read, prefetch, and write cycles is given inside the
parentheses as (r/p/w). These cycles are included in the total clock cycle number.
Instruction
ABCD
Dn,Dn
ABCD
–(An),–(An)
SBCD
Dn,Dn
SBCD
–(An),–(An)
ADDX
Dn,Dn
ADDX
–(An),–(An)
SUBX
Dn,Dn
SUBX
–(An),–(An)
CMPM
(An)+,(An)+
PACK
Dn,Dn,#<data >
PACK
–(An),–(An),#<data >
UNPK
Dn,Dn,#<data >
UNPK
–(An),–(An),#<data >
8-32
Best Case
4(0/0/0)
14(2/0/1)
4(0/0/0)
14(2/0/1)
2(0/0/0)
10(2/0/1)
2(0/0/0)
10(2/0/1)
8(2/0/0)
3(0/0/0)
11(1/0/1)
5(0/0/0)
11(1/0/1)
M68020 USER'S MANUAL
Cache Case
Worst Case
4(0/0/0)
5(0/1/0)
16(2/0/1)
17(2/1/1)
4(0/0/0)
5(0/1/0)
16(2/0/1)
17(2/1/1)
2(0/0/0)
3(0/1/0)
12(2/0/1)
13(2/1/1)
2(0/0/0)
3(0/1/0)
12(2/0/1)
13(2/1/1)
9(2/0/0)
10(2/1/0)
6(0/0/0)
7(0/1/0)
13(1/0/1)
13(1/1/1)
8(0/0/0)
9(0/1/0)
13(1/0/1)
13(1/1/1)
MOTOROLA