Synchronous Baud Rate Generator Examples; Scc Mode Register (Scm); Table 4-4. Typical Bit Rates Of Asynchronous Communication - Motorola MC68302 User Manual

crystal, an externally supplied UART clock on the TCLK or RCLK pins can be as high as
6.67 MHz, giving a maximum baud rate of 417 kbaud.
The baud rate using the baud rate generator is (System Clock or TIN1 clock)/(1 or 4)/(Clock
Divider + 1)/16. The baud rate using the baud rate generator with an externally supplied
clock to the TCLK or RCLK pins is always (TCLK or RCLK)/16.
Table 4-4 shows examples of typical bit rates of asynchronous communication and how to
obtain them with the baud rate generator using an internally supplied clock.

Table 4-4. Typical Bit Rates of Asynchronous Communication

Baud Rates
DIV4
150 1
300 1
600 0
1200 0
2400 0
4800 0
9600 0
19200 0
38400 0

4.5.2.2 Synchronous Baud Rate Generator Examples

For synchronous communication (HDLC/SDLC, BISYNC, DDCMP, Transparent, and
V.110), the internal clock is identical to the baud rate output. To obtain the desired rate, the
user selects the appropriate system clock according to the following equation:
Baud rate = (System Clock or TIN1 Clock)/(Clock Divider + 1)/(1 or 4) according
For example, to get the data rate of 64 kbps, the system clock can be 15.36 MHz, DIV4 = 0,
and the Clock Divider = 239. Of course, a 64 kbps rate provided externally on the TCLK or
RCLK pins could also be used.

4.5.3 SCC Mode Register (SCM)

Each SCC has a mode register. The functions of bits 5–0 are common to each protocol. The
function of the specific mode bits varies according to the protocol selected by the MODE1–
MODE0 bits. They are described in the relevant sections for each protocol type. Each SCM
is a 16-bit, memory-mapped, read-write register. The SCMs are cleared by reset.
15
SPECIFIC MODE BITS
DIAG1–DIAG0—Diagnostic Mode
00 = Normal operation (CTS, CD lines under automatic control)
In this mode, the CTS and CD lines are monitored by the SCC controller. The
SCC controller uses these lines to automatically enable/disable reception and
transmission.
MOTOROLA
15.36
Actual
DIV DIV4
Frequency
1599 150 1
799 300 1
1599 600 0
799 1200 0
399 2400 0
199 4800 0
99 9600 0
49 19200 0
24 38400 0
to the DIV4 bit
MC68302 USER'S MANUAL
Communications Processor (CP)
16.0
Actual
DIV DIV4
Frequency
1666 149.97 1
832 300.12 1
1666 599.88 0
832 1200.48 0
416 2398.08 0
207 4807.69 0
103 9615.34 0
51 19230.8 0
25 38461.53 0
6 5 4
DIAG1 DIAG0 ENR
16.667
Actual
DIV
Frequency
1735 150.01
867 300.02
1735 600.05
867 1200.1
433 2400.2
216 4800.4
108 9556.76
53 19290.5
26 38581.0
3 2 1 0
ENT MODE1 MODE0
4-27