Absolute Short Address - Motorola CPU32 Reference Manual

M68300 series central processor unit
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In this mode, the program counter, the index register, and the displacement are
all optional. However, the user must supply the assembler notation "ZPC" (zero
value is taken for the program counter) to indicate that the program counter is
not used. This scheme allows the user to access the program space without
using the program counter in calculating the EA. The user can access the
program space with a data register indirect access by placing ZPC in the
instruction and specifying a data register (On) as the index register.
GENERATION:
ASSEMBLER SYNTAX:
EA
=
(PC) + (Xn) + bd
(bd, PC, Xn. SIZE'SCALE)
MODE:
REGISTER:
6n
;;-;31 _ _ _ _ _ _ _ _ _ _ _ _ ----,
PROGRAM COUNTER:
ADDRESS OF EXTENSION WORD
31
BASE DISPLACEMENT:
SIGN-EXTENDED VALUE
31
INDEX REGISTER:
SIGN-EXTENDED VALUE
SCALE:
SCALE VALUE
MEMORY ADDRESS:
31
NUMBER OF EXTENSION WORDS:
1,2,OR3
OPERAND
3.4.3.4 Absolute Short Address
In this addressing mode, the operand
IS
In
memory, and the address of the
operand is in the extension word. The 16-bit address is sign extended to 32 bits
before it is used.
MOTOROLA
3-10
GENERATION:
ASSEMBLER SYNTAX:
MODE:
REGISTER:
EXTENSION WORD:
MEMORY ADDRESS:
EAGIVEN
(xxx).w
111
000
31 _ _ _ _ _ _ ,.--;-15'---_ _ _ _ --;
----~~:
[ _
~N ET~DED
_
MEMORY ADDRESS
31
NUMBER OF EXTENSION WORDS:
OPERAND
DATA ORGANIZATION AND
CPU32 REFERENCE MANUAL
ADDRESSING
CAPABILITIES

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