15
op
15
op
15
15
op
15
op
15
op
15
15
op
15
[Legend]
op:
Operation field
cc:
Condition field
rm:
Register field
disp:
Displacement
abs:
Absolute address
Figure 2.8 Branching Instruction Codes
8
7
cc
8
7
rm
8
7
op
abs
8
7
8
7
8
7
rm
8
7
op
abs
8
7
8
7
op
0
disp
Bcc
0
0
0
0
0
JMP (@Rm)
0
JMP (@aa:16)
0
abs
JMP (@@aa:8)
0
disp
BSR
0
0
0
0
0
JSR (@Rm)
0
JSR (@aa:16)
0
abs
JSR (@@aa:8)
0
RTS
Rev. 7.00 Mar 10, 2005 page 51 of 652
Section 2 CPU
REJ09B0042-0700