Renesas H8 Series Hardware Manual page 488

8-bit single-chip microcomputer

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Table of Contents

Section 14 Power-On Reset and Low-Voltage Detection Circuits (H8/38124 Group Only)

When the power-supply voltage does not fall below Vreset1 (typ. = 2.3 V) voltage but rises above

Vint (U) (typ. = 4.0 V) voltage, the LVDI sets the

this time, the LVDUF bit in LVDSR is set to 1 and an IRQ0 interrupt request is simultaneously

If the power supply voltage (Vcc) falls below Vreset1 (typ. = 2.3 V) voltage, the LVDR function

is performed.

The reference voltage, power supply voltage drop detection level, and power supply voltage rise

detection level can be input to the LSI from external sources via the Vref, extD, and extU pins.

Figure 14.5 shows the operational timing using input from the Vref, extD, and extU pins.

First, make sure that the voltages input to pins extD and extU are set to higher levels than the

interrupt detection voltage Vexd. After initial settings are made, a power supply drop interrupt is

generated if the extD input voltage drops below Vexd. After a power supply drop interrupt is

generated, if the external power supply voltage rises and the extU input voltage rises higher than

Vexd, a power supply rise interrupt is generated. As with the on-chip circuit, the above function

should be used in conjunction with LVDR (Vreset1) when the LVDI function is used.

Rev. 7.00 Mar 10, 2005 page 446 of 652

REJ09B0042-0700

IRQ0 interrupt generated IRQ0 interrupt generated

Figure 14.4 Operational Timing of LVDI Circuit

signal to 1. If the LVDUE bit is 1 at