Renesas H8 Series Hardware Manual page 636

Appendix B Internal I/O Registers
PWCR1—PWM1 Control Register
Bit 7

Initial value 1

Read/Write
Clock Select
0 The input clock is φ (tφ *
The conversion period is 512/φ, with a minimum modulation width of 1/2φ
The input clock is φ/2 (tφ *
The conversion period is 1,024/φ, with a minimum modulation width of 1/φ
1 The input clock is φ/4 (tφ *
The conversion period is 2,048/φ, with a minimum modulation width of 2/φ
The input clock is φ/8 (tφ *
The conversion period is 4,096/φ, with a minimum modulation width of 4/φ
PWH Output Select (H8/38124 Group only)
0 10-bit PWM
1 Event counter PWM
Notes: 1. tφ: Period of PWM1 input clock
2. 1 on products other than the H8/38124 Group
Rev. 7.00 Mar 10, 2005 page 594 of 652
REJ09B0042-0700
6 5 4
  
1 1 1
  
1
= 1/φ)
1
= 2/φ)
1
= 4/φ)
1
= 8/φ)
H'D0
3 2 1

PWCR12 PWCR11
0 *
2
1 0

R/W W
10-Bit PWM
0
PWCR10
0
W