Renesas H8 Series Hardware Manual page 20

Item
10.3.3 Operation in
Synchronous Mode
• Receiving
Figure 10.14
Example of Operation
when Receiving in
Synchronous Mode
11.3.1 Operation
12.1.1 Features
12.2.2 A/D Mode
Register (AMR)
Bit 7—Clock Select
(CKS)
12.7.1 Permissible
Signal Source
Impedance
12.7.2 Influences on
Absolute Precision
12.7.3 Additional
Usage Notes
Rev. 7.00 Mar 10, 2005 page xx of xlii
Page Revision (See Manual for Details)
374 Figure amended
Serial
clock
Serial
data
RDRF
OER
LSI RXI request
operation
User
processing
396 Description amended
1. Set PWM1 or PWM2 in PMR9 to 1 for the PWM channel to
be used, so that pin P9
the PWM output pin, or both are designated as PWM output
pins.
399 Description amended
• Conversion time: approx. 12.4 µs per channel (at 5 MHz
operation)/6.2 µs (at 10 MHz operation)*
403 Bit table and notes amended
Bit 7
CKS Conversion Period
0 62/φ (initial value)
1 31/φ
Notes: 1. With the H8/38024, H8/38024S, and H8/38024F-ZTAT operation cannot be guaranteed
if the conversion time is less than 12.4 µs. Make sure to select a setting that gives a
conversion time of 12.4
With the H8/38124 Group operation cannot be guaranteed if the conversion time is less
than 6.2 µs. Make sure to select a setting that gives a conversion time of 6.2 µs or
more.
2. H8/38124 Group only.
413 Title amended
413 Title amended
414 Title amended
Bit 7 Bit 0 Bit 7
1 frame
RDRE cleared RXI request
to 0
RDR data read
/PWM1 or P9
0
φ φ φ φ = 1 MHz
62 µs
31 µs
µs or more.
Bit 0 Bit 1 Bit 6
1 frame
ERI request in
response to
overrun error
RDR data has Overrun error
not been read processing
(RDRF = 1)
/PWM2 is designated as
1
Conversion Time
φ φ φ φ = 10 MHz *
φ φ φ φ = 5 MHz
12.4 µs 6.2 µs
— * — *
1
Bit 7
2
1