Register Descriptions - Renesas H8 Series Hardware Manual

4.1.3

Register Descriptions

Table 4.1 lists the registers that control the clock pulse generators. The registers listed in table 4.1
are only implemented in the H8/38124 Group.
Table 4.1 Clock Pulse Generator Control Registers
Name
Clock pulse generator control
register
Clock Pulse Generator Control Register (OSCCR)
Bit 7
SUBSTP
Initial value 0
Read/Write R/W
OSCCR is an 8-bit read/write register that contains the flag indicating the selection of system
clock oscillator or on-chip oscillator, indicates the input level of the IRQAEC pin during resets,
and controls whether the subclock oscillator operates or not.
Bit 7—Subclock Oscillator Stop Control (SUBSTP)
Bit 7 controls whether the subclock oscillator operates or not. It can be set to 1 only in the active
mode (high-speed/medium-speed). Setting bit 7 to 1 in the subactive mode will cause the LSI to
stop operating.
Bit 7
SUBSTP Description
0 Subclock oscillator operates
1 Subclock oscillator stopped
Bit 6—Reserved
This bit is reserved. It is always read as 0 and cannot be written to.
Bits 5 to 3—Reserved
These bits are read/write enabled reserved bits.
Abbreviation
OSCCR
6 5 4
— — —
0 0 0
R R/W R/W
Section 4 Clock Pulse Generators
R/W Initial Value
R/W —
3 2
— IRQAECF OSCF
0 —
R/W R
Rev. 7.00 Mar 10, 2005 page 105 of 652
Address
H'FFF5
1 0
—
— 0
R R/W
(initial value)
REJ09B0042-0700