Low-Voltage Detection Status Register (Lvdsr) - Renesas H8 Series Hardware Manual

Section 14 Power-On Reset and Low-Voltage Detection Circuits (H8/38124 Group Only)
Table 14.3 shows the relationship between LVDCR settings and function selections. Refer to table
14.3 when making settings to LVDCR.
Table 14.3 LVDCR Settings and Function Selections
LVDCR Setting Value
LVDE LVDSEL LVDRE
0 * *
1 1 1
1 0 0
1 0 0
1 0 1
Note: Setting values marked with an asterisk (*) are invalid.
14.2.2

Low-Voltage Detection Status Register (LVDSR)

Bit 7
OVF
0 *
Initial value
Read/Write R/W
Note: * These bits initialized by resets trigged by LVDR.
LVDSR is an 8-bit read/write register. It is used to control external input selection, indicates when
the reference voltage is stable, and indicates if the power supply voltage goes below or above a
specified range.
Bit 7—LVD Reference Voltage Stabilized Flag (OVF)
This bit indicates when the low-voltage detection counter (LVDCNT) overflows.
Bit 7
OVF Description
0
[Clearing condition]
When 0 is written after reading 1
1 [Setting condition]
When the low-voltage detection counter (LVDCNT) overflows
Rev. 7.00 Mar 10, 2005 page 440 of 652
REJ09B0042-0700
Power-on
LVDDE LVDUE Reset
* *
0 0
1 0
1 1
1 1
6 5
— —
0 0
R/W R/W
Low-Voltage
Low-Voltage Detection
Detection Voltage Drop
Reset Interrupt
— —
—
—
—
4 3
—
VREFSEL
0 0
R/W R/W R/W
Low-Voltage
Detection
Voltage Rise
Interrupt
—
—
—
2 1 0
— LVDDF LVDUF
0 * 0 *
0
R/W R/W
(initial value)