Renesas H8 Series Hardware Manual page 19

Item
10.2.8 Bit Rate
Register (BRR)
Table 10.5 Maximum
Bit Rate for Each
Frequency
(Asynchronous Mode)
10.2.8 Bit Rate
Register (BRR)
Table 10.6 Examples
of BRR Settings for
Various Bit Rates
(Synchronous
Mode) (2)
Page Revision (See Manual for Details)
350 Table amended
OSC (MHz)
0.0384 *
2
2.4576
4
10
16
20
352 Table amended
Bit Rate
(bit/s) n
200 0
250 2
300 0
500 0
1K 0
2.5K 0
5K 0
10K 0
25K 0
50K 0
100K 0
250K 0
500K 0
1M —
Notes amended
Notes: The value set in BRR is given by the following equation:
N =
where
Maximum Bit Rate
φ φ φ φ (MHz)
(bit/s)
0.0192 600
1 31250
1.2288 38400
2 62500
5 156250
8 250000
10 312500
φ
10 MHz
N Error
12499 0
624 0
8332 0
4999 0
2499 0
999 0
499 0
249 0
99 0
49 0
24 0
9 0
4 0
— —
φ
– 1
2n
(4 • 2 • B)
B: Bit rate (bit/s)
N: Baud rate generator BRR setting (0 ≤ N ≤ 255)
φ: System clock frequency
n: Baud rate generator input clock number (n = 0, 2, or 3)
(The relation between n and the clock is shown in table 10.7.)
Rev. 7.00 Mar 10, 2005 page xix of xlii
Setting
n N
0 0
0 0
0 0
0 0
0 0
0 0
0 0