Table Of Contents - Renesas H8 Series Hardware Manual
8-bit single-chip microcomputer
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Also See for H8 Series:
- Hardware manual (551 pages) ,
- User manual (272 pages) ,
- Hardware manual (434 pages)
Table of Contents
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1.1
Overview...........................................................................................................................
1.2
Internal Block Diagram.....................................................................................................
1.3
Pin Arrangement and Functions........................................................................................
1.3.1
Pin Arrangement..................................................................................................
1.3.2
Pin Functions ....................................................................................................... 19
...................................................................................................................... 25
2.1
Overview........................................................................................................................... 25
2.1.1
Features................................................................................................................ 25
2.1.2
Address Space...................................................................................................... 26
2.1.3
Register Configuration......................................................................................... 26
2.2
Register Descriptions........................................................................................................ 27
2.2.1
General Registers................................................................................................. 27
2.2.2
Control Registers ................................................................................................. 27
2.2.3
Initial Register Values ......................................................................................... 29
2.3
Data Formats..................................................................................................................... 29
2.3.1
Data Formats in General Registers ...................................................................... 30
2.3.2
Memory Data Formats......................................................................................... 31
2.4
Addressing Modes ............................................................................................................ 32
2.4.1
Addressing Modes ............................................................................................... 32
2.4.2
Effective Address Calculation ............................................................................. 34
2.5
Instruction Set................................................................................................................... 38
2.5.1
Data Transfer Instructions ................................................................................... 40
2.5.2
Arithmetic Operations ......................................................................................... 42
2.5.3
Logic Operations ................................................................................................. 43
2.5.4
Shift Operations................................................................................................... 44
2.5.5
Bit Manipulations ................................................................................................ 46
2.5.6
Branching Instructions......................................................................................... 50
2.5.7
System Control Instructions................................................................................. 52
2.5.8
Block Data Transfer Instruction .......................................................................... 53
2.6
Basic Operational Timing ................................................................................................. 55
2.6.1
Access to On-Chip Memory (RAM, ROM) ........................................................ 55
2.6.2
Access to On-Chip Peripheral Modules............................................................... 56
2.7
CPU States........................................................................................................................ 57
2.7.1
Overview.............................................................................................................. 57
Contents
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Rev. 7.00 Mar 10, 2005 page xxxi of xlii
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