Renesas H8 Series Hardware Manual page 601

LVDCR—Low-Voltage Detection Control Register
Note: This register is implemented on the H8/38124 Group only.
Bit
Initial value
Read/Write
Power Supply Rise (LVDU) Detection Level External Input Select
0 LVDU detection level generated by on-chip ladder resistor (initial value)
1 LVDU detection level input to extU pin
Power Supply Drop (LVDD) Detection Level External Input Select
0 LVDD detection level generated by on-chip ladder resistor (initial value)
1 LVDD detection level input to extD pin
LVD Enable
0 Low-voltage detection circuit not used (standby status) (initial value)
1 Low-voltage detection circuit use
Note: * These bits are not initialized by resets trigged by LVDR. They are initialized by
power-on resets and watchdog timer resets.
7 6 5

LVDE VINTDSEL
0 *
0 0
R/W R/W R/W
Voltage Rise Interrupt Enable
0 Voltage rise interrupt requests disabled (initial value)
1 Voltage rise interrupt requests enabled
Voltage Drop Interrupt Enable
0 Voltage drop interrupt requests disabled (initial value)
1 Voltage drop interrupt requests enabled
LVDR Enable
0 LVDR resets disabled
1 LVDR resets enabled
LVDR Detection Level Select
0 Reset detection voltage 2.3 V (typ.)
1 Reset detection voltage 3.3 V (typ.)
Appendix B Internal I/O Registers
H'86
4 3 2
VINTUSEL LVDSEL LVDRE
0 * 0 *
0
R/W R/W R/W
(initial value)
Rev. 7.00 Mar 10, 2005 page 559 of 652
LVDC
1 0
LVDDE LVDUE
0 0
R/W R/W
(initial value)
REJ09B0042-0700