Renesas H8 Series Hardware Manual page 90

Section 2 CPU
15
op
15
op
15
op
op
15
op
op
15
op
op
15
op
op
15
op
15
op
op
15
op
op
[Legend]
op: Operation field
rm, rn: Register field
abs: Absolute address
IMM: Immediate data
Rev. 7.00 Mar 10, 2005 page 48 of 652
REJ09B0042-0700
8 7
IMM
8 7
rm
8 7
rn
IMM
8 7
rn
rm
8 7
IMM
8 7
rm
8 7
IMM
8 7
rn
IMM
8 7
IMM
Figure 2.7 Bit Manipulation Instruction Codes
BSET, BCLR, BNOT, BTST
0
Operand:
rn
Bit No.:
0
Operand:
rn
Bit No.:
0
0 0 0 0
Operand:
0 0 0 0
Bit No.:
0
0 0 0 0
Operand:
0 0 0 0
Bit No.:
0
abs
Operand:
0 0 0 0
Bit No.:
0
abs
Operand:
0 0 0 0
Bit No.:
BAND, BOR, BXOR, BLD, BST
0
Operand:
rn
Bit No.:
0
0 0 0 0
Operand:
0 0 0 0
Bit No.:
0
abs
Operand:
0 0 0 0
Bit No.:
register direct (Rn)
immediate (#xx:3)
register direct (Rn)
register direct (Rm)
register indirect (@Rn)
immediate (#xx:3)
register indirect (@Rn)
register direct (Rm)
absolute (@aa:8)
immediate (#xx:3)
absolute (@aa:8)
register direct (Rm)
register direct (Rn)
immediate (#xx:3)
register indirect (@Rn)
immediate (#xx:3)
absolute (@aa:8)
immediate (#xx:3)