Item
Symbol
Input pin high width t
IH
Input pin low width
t
IL
UD pin minimum
t
UDH
transition width
t
UDL
Notes: 1. Selected with SA1 and SA0 of system control register 2 (SYSCR2).
2. The figure in parentheses applies when an external clock is used.
Values
Applicable
Pins
Min
Typ
2
—
,
,
I R Q
I R Q
0
1
,
,
I R Q
I R Q
3
4
IRQAEC,
to
W K P
0
,
W K P
7
TMIC, TMIF,
TMIG,
A D T R G
AEVL, AEVH
0.5
—
,
,
2
—
I R Q
I R Q
0
1
,
,
I R Q
I R Q
3
4
IRQAEC,
to
W K P
0
,
W K P
7
TMIC, TMIF,
TMIG,
A D T R G
AEVL, AEVH
0.5
—
UD
4
—
Section 16 Electrical Characteristics
Max
Unit
Test Condition
—
t
cyc
t
subcyc
—
t
osc
—
t
cyc
t
subcyc
—
t
osc
—
t
cyc
t
subcyc
Rev. 7.00 Mar 10, 2005 page 501 of 652
Reference
Figure
Figure 16.3
Figure 16.3
Figure 16.6
REJ09B0042-0700