Renesas H8 Series Hardware Manual page 15

Item
6.5.3 Block
Configuration
Figure 6.8(1) Block
Configuration of
32-kbyte Flash
Memory
Figure 6.8(2) Block
Configuration of
16-kbyte Flash
Memory
6.6.3 Erase Block
Register (EBR)
Table 6.6 Division of
Blocks to Be Erased
6.7 On-Board
Programming Modes
6.7.1 Boot Mode
Table 6.9 Oscillating
Frequencies (f ) for
osc
which Automatic
Adjustment of LSI Bit
Rate Is Possible
Page Revision (See Manual for Details)
156 Figure title amended
157 Newly added
162 Table amended
EBR
0
1
2
3
4
164 Description amended
At reset-start in reset mode, the series of HD64F38024,
HD64F38024R, HD64F38124, and HD64F38122 changes to a
mode depending on the TEST pin settings, P95 pin settings,
and input level of each port, as shown in table 6.7.
166 Table amended
Product Group
F-ZTAT version of
H8/38024 Group and
F-ZTAT version of
H8/38024R Group
F-ZTAT version of
H8/38124 Group
Bit Name Block (Size)
EB0 EB0 (1 Kbyte)
EB1 EB1 (1 Kbyte)
EB2 EB2 (1 Kbyte)
EB3 EB3 (1 Kbyte)
EB4 EB4 (12 Kbytes)
EB4 (28 Kbytes)
Host Bit Rate Oscillating Frequencie
4,800 bps 8 to 10 MHz
2,400 bps 4 to 10 MHz
1,200 bps 2 to 10 MHz
19,200 bps 16 to 20 MHz
9,600 bps 8 to 20 MHz
4,800 bps 6 to 20 MHz
2,400 bps 2 to 20 MHz
1,200 bps 2 to 20 MHz
Rev. 7.00 Mar 10, 2005 page xv of xlii
Address
H'0000 to H'03FF
H'0400 to H'07FF
H'0800 to H'0BFF
H'0C00 to H'0FFF
H'1000 to H'3FFF (HD64F38122)
H'1000 to H'7FFF (HD64F38124,
HD64F38024, HD64F38024R)
s (f )
Range of LSI
OSC