Renesas H8 Series Hardware Manual page 122

Section 3 Exception Handling
Bit 4—IRQ Edge Select (IEG4)
4
Bit 4 selects the input sensing of the
Bit 4
IEG4 Description
0 Falling edge of
1 Rising edge of
Bit 3—IRQ Edge Select (IEG3)
3
Bit 3 selects the input sensing of the
Bit 3
IEG3 Description
0 Falling edge of
1 Rising edge of
Bit 2—Reserved
Bit 2 is reserved: it can only be written with 0.
Bit 1—IRQ Edge Select (IEG1)
1
Bit 1 selects the input sensing of the
Bit 1
IEG1 Description
0 Falling edge of
1 Rising edge of
Bit 0—IRQ Edge Select (IEG0)
0
Bit 0 selects the input sensing of pin
Bit 0
IEG0 Description
0 Falling edge of
1 Rising edge of
Rev. 7.00 Mar 10, 2005 page 80 of 652
REJ09B0042-0700
pin and
I R Q
4
and pin input is detected
I R Q A D T R G
4
and pin input is detected
I R Q A D T R G
4
pin and TMIF pin.
I R Q
3
and TMIF pin input is detected
I R Q
3
and TMIF pin input is detected
I R Q
3
pin and TMIC pin.
I R Q
1
and TMIC pin input is detected
I R Q
1
and TMIC pin input is detected
I R Q
1
.
I R Q
0
pin input is detected
I R Q
0
pin input is detected
I R Q
0
pin.
A D T R G
(initial value)
(initial value)
(initial value)
(initial value)