Renesas H8 Series Hardware Manual page 599

FLMCR2—Flash Memory Control Register 2
Bit 7
FLER
Initial value 0
Read/Write R
Flash memory error
Note: A write to FLMCR2 is prohibited.
FLPWCR—Flash Memory Power Control Register
Bit 7
PDWND
Initial value 0
Read/Write R/W
Power-down Disable
0 When the system transits to sub-active mode,
1 When the system transits to sub-active mode,
6 5
 
0 0
 
6 5
 
0 0
 
the flash memory changes to low-power mode
the flash memory changes to normal mode
Appendix B Internal I/O Registers
H'F021
4 3 2
  
0 0 0
  
H'F022
4 3 2
  
0 0 0
  
Rev. 7.00 Mar 10, 2005 page 557 of 652
Flash Memory
1 0
 
0 0
 
Flash Memory
1 0
 
0 0
 
REJ09B0042-0700